[EP-003] Electric Power & Energy Systems 3

11:15 AM - 11:30 AM JST(2:15 AM - 2:30 AM UTC)

[EP-3-03] EMI Mitigation and Inductance Reduction in SiC-Based Power Modules through Layout-Aware Redesign

*Raymond Tenorio Borres¹, Thiyu Warnakulasooriya², Sihoon Choi³, Jun Imaoka³, Masayoshi Yamamoto³, Ang-Ying Lin⁴, Yan Bo Fang⁴, Chien Wei Chang⁴, Po-Kai Chiu⁴, Yan-Cheng Liu⁴ (1. Department of Electrical, Electronics, and Information Engineering, Nagoya University, Nagoya, Japan, 2. Department of Electrical Engineering, Nagoya University, Nagoya, Japan, 3. Institute of Materials and Systems for Sustainability (IMaSS), Nagoya University, Nagoya, Japan, 4. Compound Semiconductor & Power Electronic System Division Electric and Optoelectronic System Research Laboratories Industrial Technology Research Institute)