[A-5-01(Invited)]Enabling Hetero-integration of III-V and Ge-based Transistors on Silicon with Ultra-thin Buffers formed by Interfacial Misfit Technique
○X. Gong1, S. Yadav1, K. Goh1, K. Tan2, A. Kumar1, K. Low1, B. Jia2, S. Yoon2, G. Liang1, Y. Yeo1(1.National Univ. of Singapore(Singapore), 2.Nanyang Technological Univ.(Singapore))
