[B-5] Ferroelectric FET

10:00 AM - 10:15 AM JST(1:00 AM - 1:15 AM UTC)

[B-5-04] Understanding and Improving the Retention Loss in the Gate-Injection Ferroelectric NAND Cells by Optimizing the Retention Bias Voltage

〇Runhao Han¹, Tao Hu¹, Jia Yang¹, Junshuai Chai¹, Hao Xu¹, Xiaolei Wang¹, Wenwu Wang¹ (1. Inst. of Microelectronics Chinese Academy of Sciences (China))