Parallel session 1

2:40 PM - 3:00 PM JST(5:40 AM - 6:00 AM UTC)

[C05-1-03] Partially Fault-tolerant Quantum Computing Architecture with Error-corrected Clifford Gates and Space-time Efficient Analog Rotations

*Yutaro Akahoshi¹, Kazunori Maruyama¹, Hirotaka Oshima¹, Shintaro Sato¹, Keisuke Fujii^2,3 (1. Fujitsu Ltd. (Japan), 2. Osaka Univ. (Japan), 3. RIKEN (Japan))

On-demand video

Keywords:

Quantum computing,Fault-tolerant quantum computing,Quantum error correction,Quantum error mitigation,Surface code