[D-2] ﾆｭｰﾛｺﾝﾋﾟｭｰﾃｨﾝｸﾞ

3:30 PM - 3:45 PM JST(6:30 AM - 6:45 AM UTC)Candidate for Academic Incentive Award

[D-2-08] A Study of an Ultra-Low Power Analog CMOS Spiking Neuron Circuit Using High-Threshold Voltage MOSFETs

○Tetsuta Sakai^1,2, Satoshi Moriya², Hideaki Yamamoto^1,2, Shigeo Sato^1,2 (1. Department of Electrical, Information and Physics Engineering, School of Engineering, Tohoku University, 2. Research Institute of Electrical Communication Tohoku University)

Keywords:

spiking neuron,analog CMOS circuit,edge computing