Session Details
[C-8]超伝導エレクトロニクス
Wed. Mar 6, 2024 9:00 AM - 11:45 AM JST
Wed. Mar 6, 2024 12:00 AM - 2:45 AM UTC
Wed. Mar 6, 2024 12:00 AM - 2:45 AM UTC
School of Engineering 106(HIROSHIMA UNIVERSITY Higashi-Hiroshima campus)
Chair:Hiroaki Myoren(Saitama University), Mizugaki Yoshinao
[C-8-01]Design of an SFQ All-Digital Phase Locked Loop with a Time-to-Digital Converter
○Daiki Fukuyo1, Hiroshi Shimada1, Yoshinao Mizugaki1 (1. The University of Electro-Communications)
[C-8-02]Investigation of single-flux-quantum circuits using giant inductance of π-SQUIDs
○Hinako Mori1, Masayuki Higashi1, Feng Li1, Masamitsu Tanaka1, Akira Fujimaki1 (1. Nagoya Univ.)
[C-8-03]Miniaturization of Superconductor FPGA by Employing External Current Control
○Sho Matsuoka1, Yuki Yamanashi1,2, Nobuyuki Yoshikawa1,2 (1. Department of Electrical and Computer Engineering, Yokohama National Univ., 2. Institute of Advanced Siences, Yokohama National Univ.)
[C-8-04]Design of Matrix Multiplication Circuits by Superconducting Stochastic Arithmetic Circuits
○Hijiri Okumura1, Yuki Yamanashi1,2, Nobuyuki Yoshikawa1,2 (1. Department of Electrical and Computer Engineering, Yokohama National Univ., 2. Institute of Advanced Sciences, Yokohama National Univ.)
[C-8-05]Small-area ALU in Unary Bit Coding Using Single Flux Quantum Circuits
○Zeyu Han1, Yuki Yamanashi1,2, Nobuyuki Yoshikawa1,2 (1. Graduate School of Engineering Science, Yokohama National University, 2. Institute of Advanced Sciences, Yokohama National University)
Break time
[C-8-06]Timing characterization of adiabatic quantum-flux-parametron using bit-error-rate
○Yu Hoshika1, Christopher L. Ayala2, Nobuyuki Yoshikawa1,2 (1. Yokohama National Univ., 2. Institute of Advanced Sciences, Yokohama National Univ.)
[C-8-07]Low-Energy Majority-Logic-Based Approximate Adders
in Adiabatic Quantum-Flux-Parametron
○Mengmeng Wang1, Olivia Chen2, Nobuyuki Yoshikawa1 (1. Yokohama National University, 2. Tokyo City University)
[C-8-08]Development of a stochastic computing-based adiabatic superconductor neuron
○Wenhui Luo1, Naoki Takeuchi2, Olivia Chen3, Nobuyuki Yoshikawa1,4 (1. Yokohama National University, 2. G-QuAT, National Institute of Advanced Industrial Science and Technology, 3. Tokyo City University, 4. IAS, Yokohama National University)
[C-8-09]An Clock Cycle-Wise Simulation Framework for Neural Network Accelerator Using Adiabatic Superconductor Devices
○Guangxian Zhu1, Yirong Kan1, Olivia Chen2 (1. Nara Institute of Science and Technology, 2. Tokyo City University)
[C-8-10]Design of SFQ Control Circuit for Braiding Operation of Topological Quantum Bits(2)
○kitaru oba1, yuki shimizu1, masato naruse1, hiroaki myoren1 (1. Graduate School of Sci. and Eng., Saitama Univ.)