General Conference of the Institute of Electronics, Information and Communication Engineers
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Presentation Information

2:45 PM - 3:00 PM JST(5:45 AM - 6:00 AM UTC)

[D-18-05]Evaluation of Variable-Parallelism Architecture for Deep Neural Network Inference

〇Atsushi Hori1, Yuu Inoue1, Fumiya Arai1, Takao Marukame1, Tetsuya Asai1, Kota Ando1 (1. Hokkaido Univ.)

Keywords:

Reconfigurable architecture,Near memory,Neuaral network

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