General Conference of the Institute of Electronics, Information and Communication Engineers
Advanced Search

Presentation Information

9:45 AM - 10:00 AM JST(12:45 AM - 1:00 AM UTC)

[D-20-10]Cooperative method of CMOS annealing and graph neural network for large-scale combinatorial optimization problems

〇Kento Hasegawa1, Pablo Loyola2, Andres Hoyos-Idrobo2, Kazuo Ono1, Toyotaro Suzumura2,3, Yu Hirate2, Masanao Yamaoka1 (1. Hitachi, Ltd., 2. Rakuten Institute of Technology, 3. The University of Tokyo)

Keywords:

Annealing,Ising,Combinatorial optimization,Machine Learning,Graph neural network

Password required to view

Back to Session information