Session Details
[A-6]VLSI設計技術
Tue. Mar 25, 2025 4:00 PM - 4:30 PM JST
Tue. Mar 25, 2025 7:00 AM - 7:30 AM UTC
Tue. Mar 25, 2025 7:00 AM - 7:30 AM UTC
Building No.1 1F 11A(Tokyo City University)
Chair:YUICHI SAKURAI
[A-6-01]Attribute-Based Encryption Accelerator Design Exploration by Automatic Scheduling Method
〇Momoko Fukuda1, Anawin Opasatian1, Makoto Ikeda1 (1. The University of Tokyo)
[A-6-02]Gap Channel Routing Problem in VLSI Physical Design
〇Masayuki Shimoda1, Atsushi Takahashi1, Kosuke Yanagidaira2, Chikaaki Kodama2 (1. Institute of Science Tokyo, 2. KIOXIA Corporation)