[B-8] Technical Committee on Communication System

10:15 AM - 10:30 AM JST(1:15 AM - 1:30 AM UTC)Candidate for Academic Incentive AwardCareer Explorer

[B-8-23] Study of Threshold Voltage Compensation Techniques for CMOS Analog Circuit Applications

◎△Shuntaro Kushio¹, Tashiro Takayoshi², Sakai Yoshihito², Sekiguchi Masayoshi², Shimada Tatsuya², Kimura Shunji¹ (1. Kyushu university, 2. NTT Access Network Service Systems Laboratories)

Keywords:

CMOS,Body bias effect,CMOS inverter

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