Presentation Information

12:00 PM - 12:15 PM JST(3:00 AM - 3:15 AM UTC)Candidate for Academic Incentive Award

[C-15-20]Error Analysis in Circuit Analysis by Using Modification DLT-FILT

◎Masashi Umeda¹, Seiya Kishimoto¹, Shinichiro Ohnuki¹ (1. Nihon University)

Discrete Laplace Transform,FILT,Time Response Analysis,Complex Frequency,Transient Response Analysis