General Conference of the Institute of Electronics, Information and Communication Engineers
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Session Details

一般セッションA. Engineering Sciences Society : A-1．Circuits and Systems

[A-1]Circuits and Systems

Thu. Mar 12, 2026 9:00 AM - 12:00 PM JST
Thu. Mar 12, 2026 12:00 AM - 3:00 AM UTC
Building 1 4F S404(Kyushu Sangyo University)
Chair:Takase Yasuhide(Murata Manufacturing Co.， Ltd.), HIROKI SATOH
9:00 AM - 9:15 AM JST(12:00 AM - 12:15 AM UTC)Candidate for Academic Incentive AwardCareer Explorer

[A-1-05]CTLE with automatic gain control adapted to PAM4 packet signal

◎△Shunsuke Imaeda1, Kensuke Mizutani1, Tsubasa Yabutani1, Daisuke Ito2, Makoto Nakamura2 (1. Graduate School of Gifu Univ., 2. Gifu Univ.)
9:15 AM - 9:30 AM JST(12:15 AM - 12:30 AM UTC)Candidate for Academic Incentive AwardCareer Explorer

[A-1-06]Comparison of power efficiency in optical transceiver focusing on optical modulation schemes

◎△Masataka Furuta1, Shoya Onda1, Daisuke Ito2, Makoto Nakamura2 (1. Graduate School of Gifu Univ., 2. Gifu Univ.)
9:30 AM - 9:45 AM JST(12:30 AM - 12:45 AM UTC)Candidate for Academic Incentive Award

[A-1-07]Proposal for Transmission Distance Adaptive Power Control Technology for Subscriber Premises Compatible with PON Systems

◎Yusuke Kusaka1, Reo Kondo1, Yo Miura1, Makoto Nakamura1, Daisuke Ito1 (1. Gifu University)
9:45 AM - 10:00 AM JST(12:45 AM - 1:00 AM UTC)Candidate for Academic Incentive AwardCareer Explorer

[A-1-08]Eye-Opening Ratio Enhancement of a Half-Rate NRZ–to–DPSK Conversion Circuit

◎△Hinata Tajima1, Daisuke Ito1, Makoto Nakamura1 (1. Gifu University)
10:00 AM - 10:15 AM JST(1:00 AM - 1:15 AM UTC)

[A-1-09]FPGA Implementation and Verification of Parametric Resonance Circuits

〇Kota Sukimoto1, Tsuda Norio1, Ichihara Yushi2, Goshima Keishiro1 (1. Aichi Institute of Technology, Department of Electrical and Electronic Engineering, 2. Quantum Information Inc)
10:15 AM - 10:30 AM JST(1:15 AM - 1:30 AM UTC)

[A-1-10]Comparison of Accuracy Rates Different from Coupling Methods for Ising Machines using Parametric Resonance Circuits

〇Manaya Takai1, Yushi Ichihara2, Norio Tsuda1, Keishiro Goshima1 (1. Aichi Institute of Technology, 2. ©Quantum Information and Communication Technology)
10:30 AM - 10:45 AM JST(1:30 AM - 1:45 AM UTC)

Break time

10:45 AM - 11:00 AM JST(1:45 AM - 2:00 AM UTC)Candidate for Academic Incentive AwardCareer Explorer

[A-1-11]A High-Speed Energy-Efficient Booster-Enhanced Mismatch-Canceling Latch-Based TRNG

◎△Yutao Deng1, Mahfuzul Islam1 (1. Institute of Science Tokyo)
11:00 AM - 11:15 AM JST(2:00 AM - 2:15 AM UTC)

[A-1-12]直列容量構造による広い周波数変調と多相信号生成可能な低消費電力 DCO の設計

〇Ryoto Fukuda1, Mahfuzul Islam1 (1. Institute of Science Tokyo)
11:15 AM - 11:30 AM JST(2:15 AM - 2:30 AM UTC)Career Explorer

[A-1-13]Self-Compensating StrongARM Latch for High-Speed Energy-Efficient True Random Number Generator Design

〇△Xinbo Huang1, Mahfuzul Islam1 (1. Institute of Science Tokyo)
11:30 AM - 11:45 AM JST(2:30 AM - 2:45 AM UTC)Candidate for Academic Incentive AwardCareer Explorer

[A-1-14]A Study on Neuromorphic Circuits of Detecting Movement of Light Stimuli

◎△Yiming Qi1, Keima Sano1, Yamato Muramoto1, Shuxin Lyu1, Ken Saito1 (1. Nihon Univ)
11:45 AM - 12:00 PM JST(2:45 AM - 3:00 AM UTC)

[A-1-15]Complex Approximation-Based Design for Variable Stopband FIR Filters with Specified Attenuation

〇Toma Miyata1, Naoyuki Aikawa2 (1. Kanagawa Institute of Technology, 2. Tokyo University of Science)
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