[16a-A33-1~11] FS.1 Focused Session "AI Electronics"

9:15 AM - 9:30 AM JST(12:15 AM - 12:30 AM UTC)

[16a-A33-2] Analog memristor pulse scheme for configuring linearity and multi-resistance level

〇ZHUO DIAO¹, Zijie Meng¹, Ryohei Yamamoto¹, Tetsuya Tohei¹, Akira Sakai¹ (1.Osaka Univ.)

Keywords:

analog memristor,artificial neural network,Machine Learning

Technological advancements in artificial neural networks (ANN) have made securing AI computational power crucial. AI computational power relies on the ability to process large-scale multiply-accumulate operations in parallel. In addition to CMOS-based GPUs and TPUs, memristors are seen as promising candidates. Memristors enable analog computations with a single element and can be compatible with traditional CMOS computers by incorporating analog-to-digital converter. However, many memristors exhibit nonlinear resistance changes, which can degrade the accuracy of ANN calculations. This study developed a method to control resistance changes linearly and in multiple steps, successfully dividing the resistance states into 64 (6 bits), 128 (7 bits), and 256 (8 bits) levels with floating-point precision.