[TuP-A] Poster Session 1

[TuP-A-10] FPGA Implementation of Parallel Non-Integer Oversampling Timing Recovery with IQ Skew Compensation

Benyao Zou¹, ○Wei Wang¹, Kaiyang Dong¹, Fan Li¹ (1. Sun Yat-sen University (China))

Keywords:

Energy-efficient optical networks and technologies

A real-time timing recovery algorithm working under non-integer oversampling is proposed to reduce analog-to-digital converter (ADC) oversampling, which can obtain 2-dB optical signal-to-noise ratio (OSNR) gain from IQ skew compensation simultaneously.