[WB3] Coherent DSP

3:30 PM - 3:45 PM JST(6:30 AM - 6:45 AM UTC)

[WB3-6] Block-Wise MLSE Processing with Small Overlap for Digital Coherent Parallel Implementation

○Yukinobu Nakajima, Hiroki Taniguchi, Shuto Yamamoto, Etsushi Yamazaki (NTT Corporation)

Keywords:

Implementation of digital signal processing subsystems for optical communications

We investigate the convergence of path metrics in Viterbi algorithm to identify the number of overlapped symbols for parallelization of MLSE. 64-Gbaud 16-QAM with 23-GHz bandwidth requires only three overlapped symbols in the parallelization scheme.