[A-1] 回路とシステム

9:00 AM - 9:15 AM JST(12:00 AM - 12:15 AM UTC)Candidate for Academic Incentive Award

[A-1-01] Automatic Gain Control Circuit for CTLE adapted to PAM4 packet signal

◎Shunsuke Imaeda¹, Shogo Ishida¹, Junsei Ohshika¹, Daisuke Ito¹, Makoto Nakamura¹ (1. Gifu Univ.)

Keywords:

Automatic Gain Control Circuit,Continuous Time Linear Equalizer,4-Level Pulse Amplitude Modulation