Session Details
[C-8]超伝導エレクトロニクス
Thu. Sep 12, 2024 1:45 PM - 3:00 PM JST
Thu. Sep 12, 2024 4:45 AM - 6:00 AM UTC
Thu. Sep 12, 2024 4:45 AM - 6:00 AM UTC
Building No.1 2F 1-254(Nippon Institute of Technology)
Chair:Takagi Kazuyoshi
[C-8-06]Reduction of Phase Diffrence of SFQ All-Digital Phase Locked Loop by Redesigning Time-to-Digital Converter
〇Daiki Fukuyo1, Hiroshi Shimada1, Yoshinao Mizugaki1 (1. The University of Electro-Communications)
[C-8-07]Initialize circuit for 2π-vortex in topoligical Josephson array
〇Yuki Shimizu1, Masato Naruse1, Hiroaki Myoren1 (1. Saitama Univ.)
[C-8-08]Design of High-speed delta-type A/D converter using comparator
〇Kazuki Ban1 (1. Saitama Univ.)
[C-8-09]Increasing Operating Speed of FIFO Synchronizer Using Single-Flux-Quantum Circuits
◎△Kosuke Hiwaki1, Tanaka Masamitsu1, Li Feng1, Fujimaki Akira1 (1. Nagoya University)
[C-8-10]Error Reduction Using Double Operations with an RSFQ Approximate Multiplier
◎shogo kato1, Nobutaka Kito1 (1. Chukyo Univ.)