Presentation Information
[BCS-2-15]Efficient Decoupling Layout for Chip Miniaturization and Stable Power Delivery in High-Frequency CMOS Integrated Circuits
〇Yudai Miyoshi1, Satoshi Tanaka1, Takeshi Yoshida1, Minoru Fujishima1 (1. Hiroshima Univ.)
Keywords:
power wiring,decoupling,miniaturization,CMOS