Session Details
[A-1]Circuits and Systems
Tue. Sep 9, 2025 11:30 AM - 12:15 PM JST
Tue. Sep 9, 2025 2:30 AM - 3:15 AM UTC
Tue. Sep 9, 2025 2:30 AM - 3:15 AM UTC
School of Engineering Building No.1 3F Lecture Room No.6(Okayama University)
Chair:Takase Yasuhide(Murata Manufacturing Co.， Ltd.)
[A-1-01]Ranking Function for Binary Trees Encoded in Left-Child Sequences
〇Kenji Mikawa1, Tomoya Kuniyoshi1 (1. Maebashi Institute of Technology)
[A-1-02]FPGA Implementation of Tensorized Neural Networks
〇Shota Moriyama1 (1. Mitsubishi Electric Corp.)
[A-1-03]Bit-width reduction of Echo State Network using Bayesian optimization
◎Yifan Geng1, Takeaki Yajima1 (1. Kyushu Univ.)