IEICE Society Conference 2025
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Session Details

一般セッションC. Electronics Society : C-12．Integrated Circuit and Devices

[C-12]Integrated Circuit and Devices

Wed. Sep 10, 2025 3:15 PM - 5:00 PM JST
Wed. Sep 10, 2025 6:15 AM - 8:00 AM UTC
Building for General Education (A/B/C) 3F C31(Okayama University)
Chair:KOSUKE MIYAJI(Shinshu University)
3:15 PM - 3:30 PM JST(6:15 AM - 6:30 AM UTC)

[C-12-01]Current estimation of SiC-MOSFET using convolutional neural network with gate waveform

〇Jun Tomisawa1, Shota Morisaki1 (1. Advanced Technology R&D center, Mitsubishi Electric Corporation)
3:30 PM - 3:45 PM JST(6:30 AM - 6:45 AM UTC)

[C-12-02]High-Speed Floating Level Shifter Circuit with POR for Active Gate Drive of SiC MOSFETs

〇Bingchen Wu1, Yichen Zhang1, Yaogan Liang1, Michihiro Ide1, Makoto Takamiya1 (1. The University of Tokyo)
3:45 PM - 4:00 PM JST(6:45 AM - 7:00 AM UTC)

[C-12-03]Active Gate Driver IC with High-Level Voltage Generated by Bootstrap Circuits for Current Balancing and Circulating Current Suppression of Two Paralleled SiC MOSFETs with Kelvin-Source Connection

〇Yuchen Li1, Yaogan Liang1, Yichen Zhang1, Michihiro Ide1, Makoto Takamiya1 (1. The University of Tokyo)
4:00 PM - 4:15 PM JST(7:00 AM - 7:15 AM UTC)

[C-12-04]A Study on Frequency Tuning Range and Operating Mode of Push-Push VCO

〇Hiyori Kishimoto1, Kiyotaka Komoku1, Jun Furuta1, Yasunori Suzuki1, Nobuyuki Itoh1 (1. Okayama Prefectural University)
4:15 PM - 4:30 PM JST(7:15 AM - 7:30 AM UTC)

[C-12-05]SiGe BiCMOSを用いた300 GHz帯低雑音差動ベース励振型バッファ独立入力整合ダウンコンバージョンミキサ

〇Shunsuke Imamura1, Kyoya Takano1 (1. Tokyo University of Science)
4:30 PM - 4:45 PM JST(7:30 AM - 7:45 AM UTC)

[C-12-06]Development of Human Machine Interface for Quadriplegic Patients - Validation of Intraoral PPG signal Classificaiton -

〇Aoi Kataura1, Yuqi Duan2, Akihiro Suzuki1, Pattaramon Thianmontri3, Takafumi Fukushima1,2, Koji Kiyoyama4, Tetsu Tanaka1,2 (1. Grad. Sch. of Biomedical Engineering, Tohoku Univ., 2. Grad. Sch. of Engineering, Tohoku Univ.,, 3. Sch. of Engineering, Tohoku Univ.,, 4. Grad. Sch. of Engineering, Nagasaki Inst. of Applied Science)
4:45 PM - 5:00 PM JST(7:45 AM - 8:00 AM UTC)

[C-12-07]Development of A 3D-Stacked Artificial Retinal Chip with Object Detection of Interest and Icon Stimulation (ODIS) for Significantly Reducing Power Consumption

〇YUQI DUAN1, Kohei Nakamura1, Aoi Kataura2, Akihiro Suzuki2, Pattaramon Thianmontri3, Takafumi Fukushima2, Koji Kiyoyama4, Tetsu Tanaka1,2 (1. Department of Mechanical Systems Engineering, Graduate School of Engineering, Tohoku University, 2. Department of Biomedical Engineering, Graduate School of Biomedical Engineering, Tohoku University, 3. Department of Mechanical and Aerospace Engineering, School of Engineering, Tohoku University, 4. Graduate School of Engineering, Nagasaki Institute of Applied Science)
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