[C-12] Integrated Circuit and Devices

1:30 PM - 1:45 PM JST(4:30 AM - 4:45 AM UTC)

[C-12-24] A Reconfigurable 24-28GHz Time-Division Full-Duplex Transceiver with 59dB Self-Interference Rejection over 400MHz

〇DONGFAN XU¹, Haiyun Gu¹, Minzhe Tang¹, Yudai Yamazaki¹, Hiroyuki Sakai¹, Kazuaki Kunihiro¹, Kenichi Okada¹ (1. Institute of Science Tokyo)

Keywords:

time-division,full-duplex,SI rejection

This work presents a reconfigurable 24–28GHz time-division (TD) full-duplex (FD) transceiver in 65nm CMOS. It supports at least 400MHz bandwidth with up to 59dB self-interference (SI) rejection, achieved by isolating TX/RX in time domain without an extra SI cancellation (SIC) path. The proposed architecture overcomes SIC bandwidth limits and allows switching to half-duplex (HD). The OTA measurements verify 400MHz 64QAM OFDM FD and HD operations, offering a low-complexity mm-Wave FD solution.