1997 International Conference on Solid State Devices and Materials
Sep 16 - Sep 19, 1997ACT CITY Hamamatsu, Hamamatsu, Japan
1997 International Conference on Solid State Devices and Materials
Sep 16 - Sep 19, 1997ACT CITY Hamamatsu, Hamamatsu, Japan
[A-4-1]Drain Disturb Relaxation by Substrate bias Selecting Scheme for Sector Erase Flash Memory with Conventional Single Stacked Gate Cell Structure
M. Yoshimi, N. Shinmura, T. Tanigami, K. Hakozaki, S. Sato, K. Iguchi(1.VLSI Development Laboratories, IC Tenri Group, SHARP Corporation)
