2014 International Conference on Solid State Devices and Materials
Sep 8 - Sep 11, 2014Tsukuba International Congress Center (EPOCHAL TSUKUBA), Ibaraki, Japan
2014 International Conference on Solid State Devices and Materials
Sep 8 - Sep 11, 2014Tsukuba International Congress Center (EPOCHAL TSUKUBA), Ibaraki, Japan
[A-8-3]A 500ps/8.5ns Array Read/Write Latency 1Mb Twin 1T1MTJ STT-MRAM designed in 90nm CMOS/40nm MTJ Process with Novel Positive Feedback S/A Circuit
T. Ohsawa1, S. Miura2, H. Honjo2, S. Ikeda1, T. Hanyu1, H. Ohno1, T. Endoh1(1.Tohoku Univ., 2.NEC Corp. (Japan))
