[B-2-04]A Novel Decrement Program-Verify Scheme of a 2T NOR Flash eNVM-Based In-Memory Computing Technology
〇Yu-Hsuan Lin1, Yu-Yu Lin1, Feng-Min Lee1, Po-Hao Tseng1, Pei-Ying Du1, Chih-Chieh Lin1, Dai-Ying Lee1, Ming-Hsiu Lee1, Kuang-Yeu Hsieh1, Keh-Chung Wang1, Chih-Yuan Lu1(1. Macronix International Co., Ltd. (Taiwan))
1-Transistor-1-NOR-Flash array is a promising candidate for embedded nonvolatile memory (eNVM) -based in-memory computing (IMC) due to its low cost and low operation power. A decrement program-verify (DPV) scheme is proposed to fine-tune the memory cell to operate in a subthreshold current region, facilitating low-power multiply-and-accumulate (MAC) function. 16-level tight and precise memory state distributions were demonstrated, with a decrement program-verify scheme. We demonstrated a linear correlation between the pro-posed concept and the experimental MAC results, affirming its practical viability.
