International Conference on Solid State Devices and Materials

Ultrathin silicon nanowires (SiNWs) are the ideal building blocks to construct field effect transistors (FETs) and sensors, thanks to their quasi-one-dimensional (1D) geometry and excellent electrostatic control. Though excellent FETs and sensors have been successfully demonstrated based on the SiNWs, grown via vapor-liquid-solid (VLS) mechanism, it is still difficult to achieve a precise position control of millions of catalytic SiNWs for a scalable integration of high-performance electronics. In this talk, we will introduce a relatively new in-plane solid-liquid-solid (IPSLS) growth mechanism, where metallic catalyst droplets consume pre-coated amorphous Si (a-Si) precursor to produce planar crystalline SiNWs. In this way, the IPSLS growth can be steadily guided by surface steps/grooves, to integrate ultrathin SiNWs, with CD<10 nm, into high-density array on planar surface or stacked on the vertical sidewalls. Based on these designable SiNW channels, high performance FET devices were successfully demonstrated, with high Ion/Ioff current >10^7 and subthreshold swing <70 mV/dec.