[A-1-3]Low Threshold Voltage Gate-First pMISFETs with Poly-Si/TiN/HfSiON Stacks Fabricated with PVD-based In-situ Solid Phase Interface Reaction (SPIR) Method
N. Kitano、H. Arimura、S. Horie、T. Hosoi、T. Shimura、H. Watanabe、T. Kawahara、S. Sakashita、Y. Nishida、J. Yugami、T. Minami、M. Kosuda(1.Graduate School of Engineering, Osaka University、2.Renesas Technology Corporation、3.Canon ANELVA Corporation)
