[TuB4] High-Speed III-V Transistors

5:45 PM - 6:00 PM JST(8:45 AM - 9:00 AM UTC)

[TuB4-04] Influence of Barrier and Gate Foot Scaling on the RF and Noise Performance of AlInAs/GaInAs HEMTs

〇Fran Kostelac¹, Giorgio Bonomo¹, Tamara Saranovac¹, Fehmi Altunkas¹, Diego Marti¹, Ralf Flückizer¹, Olivier Ostinelli¹, Colombo R. Bolognesi¹ (1. ETH Zurich (Switzerland))

High cut-off frequencies in HEMTs require simultaneous scaling of the gate foot and gate-to-channel distance to preserve optimal channel control. However, vertical scaling increases gate leakage, which degrades noise performance, making device geometry optimization critical. We conducted a systematic study of the combined effects of vertical scaling and gate foot scaling (from 100 nm down to 70 nm), as well as the impact of increased channel Indium content on transistor DC, RF, and noise characteristics.