[TuC2] GaN Vertical Power Devices

11:45 AM - 12:00 PM JST(2:45 AM - 3:00 AM UTC)

[TuC2-03] Unveiling the Trade-off Mechanism between Breakdown Voltage and Dynamic Stability in Vertical GaN FinFETs with PECVD-SiNx Spacers

〇Chengzhi Zhang¹, Aditya Kundapura Bhat¹, Khaled Ahmeda², Xiang Li², Martin Kuball¹, Matthew D Smith¹ (1. CDTR, School of Physics, University of Bristol, Tyndall Avenue, Bristol, BS8 1TL (UK), 2. Dynex Semiconductor Ltd, Doddington Road, Lincoln (UK))

This work investigates the impact of Plasma-Enhanced Chemical Vapor Deposition (PECVD) SiNx spacer layers on the performance and reliability of vertical GaN-on-GaN FinFETs. While the inclusion of a SiNx spacer increases the off-state breakdown voltage (V_BR) from 23 V to 945 V by effectively terminating the gate edge and reduce the peak electric filed at trench base, it introduces significant threshold voltage (V_TH) instability. Through Stress-Measure-Stress (SMS) analysis, we identify that plasma-induced damage creates a high-density defect reservoir (N_ot > 10¹⁹ cm^-3) deep within the gate dielectric. This leads to severe V_TH shifts under Positive Bias Instability (PBI) and a catastrophic "runaway" degradation under Negative Bias Instability (NBI), driven by a field-enhanced positive feedback mechanism.