[WeA1] Epitaxy of Novel Optical Materials

9:30 AM - 9:45 AM JST(12:30 AM - 12:45 AM UTC)

[WeA1-04] Atomic-Scale Silicon Surface Engineering for III–V and Ge Integration

〇XUANCHANG ZHANG¹, Huiwen Deng¹, Haotian Zeng¹, Hui Jia¹, Mengxun Bai¹, Danqi Lei¹, Suguo Huo², Hexing Wang¹, Liwei Cao³, Talyor Stock¹, Wei Li³, Siming Chen¹, Alwayn Seeds¹, Huiyun Liu¹, Mingchu Tang¹ (1. University College London (UK), 2. London Centre for Nanotechnology (UK), 3. Beijing University of Technology (China))

The integration of compound semiconductors on silicon is constrained by defect formation arising frompolarity and strain mismatch. In this work, two complementary silicon surface engineering strategies are presented to address these limitations in III–V and Ge heteroepitaxy. For III–V growth, an ultra-thin Si buffer is employed to enable antiphase-boundary free GaAs on on-axis Si (001) through controlled surface step reconstruction. In parallel, Ar plasma pre-treatment is applied prior to Ge growth on offcut Si, leading to reduced threading dislocation density and improved crystalline quality of Ge buffers. Together, these results demonstrate that targeted control of the Si starting surface provides an effective route for defect mitigation across distinct heteroepitaxial systems.