Presentation Information

[WeA1-04]Atomic-Scale Silicon Surface Engineering for III–V and Ge Integration

〇XUANCHANG ZHANG1, Huiwen Deng1, Haotian Zeng1, Hui Jia1, Mengxun Bai1, Danqi Lei1, Suguo Huo2, Hexing Wang1, Liwei Cao3, Talyor Stock1, Wei Li3, Siming Chen1, Alwayn Seeds1, Huiyun Liu1, Mingchu Tang1 (1. University College London (UK), 2. London Centre for Nanotechnology (UK), 3. Beijing University of Technology (China))

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