[B-10B] 光通信システム B

10:15 AM - 10:30 AM JST(1:15 AM - 1:30 AM UTC)

[B-10B-05] Improvement of Transmission Speed between SerDes Logic for VIC in FPGA and Computer

○Tokio Yukiya¹ (1. Tokyo Polytechnic University)

Keywords:

Visible Light Communication,SerDes,FPGA