The Institute of Electronics, Information and Communication Engineers General Conference
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Presentation Information

11:15 AM - 11:30 AM JST(2:15 AM - 2:30 AM UTC)Career Explorer

[C-12-31]A Nonlinearity Compensation Technique for Digital-to-Time Converter in All-Digital PLLs

○ZEZHENG LIU1, Hongye Huang1, Yuncheng Zhang1, Atsushi SHIRANE1, Kenichi Okada1　  (1. Tokyo Institute of Technology)

Keywords:

PLL,DTC nonlinearity,frequency synthesizer,fractional-n spur,pre-distortion

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