The Institute of Electronics, Information and Communication Engineers General Conference
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Session Details

一般セッションOpen Session : General Session

[A-1]回路とシステム

Tue. Mar 5, 2024 1:45 PM - 5:00 PM JST
Tue. Mar 5, 2024 4:45 AM - 8:00 AM UTC
School of Integrated Arts and Sciences　K306(HIROSHIMA UNIVERSITY Higashi-Hiroshima campus)
Chair:HIROKI SATOH, Suzuki Hiroto
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1:45 PM - 2:00 PM JST(4:45 AM - 5:00 AM UTC)Candidate for Academic Incentive Award

[A-1-01]Improvement of Signal Quality with Capacitor-less Noise Canceling TIA

○Ren Izumi1, Kyosuke Sada1, Takumi Nabeshima1, Makoto Nakamura1, Daisuke Ito1 (1. Gifu Univ.)
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2:00 PM - 2:15 PM JST(5:00 AM - 5:15 AM UTC)Candidate for Academic Incentive Award

[A-1-02]Bulk-driven low-power 5 Gb/s Transimpedance Amplifier

○Mizutani Kensuke1, Junsei Ohshika2, Shogo Ishida2, Makoto Nakamura1, Daisuke Ito1 (1. Gifu Univ., 2. Gifu Univ., Graduate School of Natural Science and Technology)
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2:15 PM - 2:30 PM JST(5:15 AM - 5:30 AM UTC)Candidate for Academic Incentive Award

[A-1-03]Automatic Gain Control Circuit for Triple Rate Burst Signal

○Kazuki Matsuo1, Koki Yushina2, Junji Togashi2, Makoto Nakamuera1, Daisuke Ito1 (1. Gifu Univ., 2. Gifu Univ., Graduate School of Natural Science and Technology)
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2:30 PM - 2:45 PM JST(5:30 AM - 5:45 AM UTC)Candidate for Academic Incentive Award

[A-1-04]Large amplitude output, broadband, and low power external modulator driver circuit

○Shoya Onda1, Kensuke Mizutani1, Junsei Ohshika2, Makoto Nakamura1, Daisuke Ito1 (1. Gifu Univ., 2. Gifu Univ., Graduate School of Natural Science and Technology)
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2:45 PM - 3:00 PM JST(5:45 AM - 6:00 AM UTC)

[A-1-05]Effects of Hierarchically Varying Conductivity Arrays for Noise Suppression

○Takumi Nabeshima1, Ren Izumi1, Daisuke Ito1, Makoto Nakamura1, Takefumi Koyama2, Katunori Mutou2 (1. Gifu Univ., 2. SEKISUI CEHMICAl)
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3:00 PM - 3:15 PM JST(6:00 AM - 6:15 AM UTC)

[A-1-06]Optimally-Driven Stacked-FET Amplifier for Large-Amplitude Broadband Operation

○Yudai Nishi1, Yohtaro Umeda1, Kyoya Takano1 (1. Tokyo University of Science)
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3:15 PM - 3:30 PM JST(6:15 AM - 6:30 AM UTC)

Break time

3:30 PM - 3:45 PM JST(6:30 AM - 6:45 AM UTC)

[A-1-07]Large-Data Transferring and Processing Platform for Accelerating Cyber-Physical Systems (CPS) in SoC FPGA

○Kosuke Moromichi1, Toshiyuki Inoue1, Akira Tsuchiya1, Keiji Kishine1 (1. Univ. of Shiga Pref.)
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3:45 PM - 4:00 PM JST(6:45 AM - 7:00 AM UTC)

[A-1-08]Memory-Access Control in FPGA-Based Image-Processing Systems for Industrial Object Detection

○Shungo Shimohane1, Kosuke Moromichi1, Toshiyuki Inoue1, Akira Tsuchiya1, Keiji Kishine1 (1. Univ. of Shiga Pref.)
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4:00 PM - 4:15 PM JST(7:00 AM - 7:15 AM UTC)

[A-1-09]Receiver Extracting Additional Data in Add-on-PAM4 Transmission for Data Management System with Frequency Modulation

○Shinya Nakashioya1, Toshiyuki Inoue1, Akira Tsuchiya1, Keiji Kishine1 (1. Univ. of Shiga Pref.)
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4:15 PM - 4:30 PM JST(7:15 AM - 7:30 AM UTC)

[A-1-10]A Comparison between Simulation and Measurement of PCB Transmission Lines for 110 GHz

○Yuma Nomura1, Yoichi Sakuraba2, Yuta Tsubouchi1, Ryuichi Fujimoto1 (1. Kioxia Corporation, 2. MoDeCH Inc.)
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4:30 PM - 4:45 PM JST(7:30 AM - 7:45 AM UTC)

[A-1-11]Method for Downsizing AES-Encryption Circuit on FPGA by Integrating Processing Modules

○Hiroyuki Fujii1, Toshiyuki Inoue1, Akira Tsuchiya1, Kishine Keiji1 (1. The Univ, of Shiga Pref.)
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4:45 PM - 5:00 PM JST(7:45 AM - 8:00 AM UTC)

[A-1-12]Application of random number generator using resistor to stochastic computing

○Shunsuke Matsuoka1, Asuma Kokami1, Shuichi Ichikawa2 (1. National Institute of Technology(KOSEN), Asahikawa College, 2. Toyohashi University of Technology)
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