[C-12] 集積回路

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[C-12-01] Evaluation of SER for SEU Measurement Circuits of NMOS and PMOS transistors in a 22 nm bulk process

〇Sotaro Taniguchi¹, Keita Yoshida¹, Ryuichi Nakajima¹, Jun Furuta², Kazutoshi Kobayashi¹ (1. Kyoto Institute of Technology, 2. Okayama Prefectual University)

Keywords:

Soft Error,Flip-flop,SEU

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