Presentation Information
[AS-P-001-5]N-polar AlN-based transistors with enhancement-mode achieved using p-NiOx gate stacks and suppression of sub-channel charge trapping in buffer layers
*Matthew D. Smith1、Chengzhi Zhang1、 Yidi Yin1、Peng Huang1、Itsuki Furuhashi2、Yoann Robin3、Markus Pristovsek3、Martin Kuball1 (1. Center for Device Thermography and Reliability, University of Bristol、2. Graduate School of Engineering, Nagoya University、3. Center for Integrated Research of Future Electronics, Institute for Materials and Systems for Sustainability, Nagoya University)