[We-3A] High Voltage Devices

2:30 PM - 2:50 PM JST(5:30 AM - 5:50 AM UTC)

[We-3A-02] Optimization of JFET Implantation Profiles for 12-kV 4H-SiC JBSFETs and JBS Diodes Using Shallow and Deep Designs

*Soo Young Moon¹, Stephen A. Mancini¹, Justin Lynch¹, Miguel Hinojosa², Aivars Lelis², Woongje Sung¹ (1. Univ. at Albany, State Univ. of New York (USA), 2. U.S. Army Research Laboratory (ARL) (USA))