[O4-3] Thermal Management for Semiconductor Devices 2

11:25 AM - 11:45 AM JST(2:25 AM - 2:45 AM UTC)

[O4-3-03] Design and Prototyping of A 3.3 kV Double Side Cooled SiC MOSFET Power Module with Porous Silver Interconnect and Microchannel Cooler

Li Zhang¹, Zachary Zintak¹, Peiyuan Sun¹, Joshua Gardner¹, *Guo-Quan Lu¹ (1. Virginia Tech (USA))

Keywords:

Power Module Packaging,SiC,Sintered Interconnect,Thermal Management