Session Details
[O3-10]Recent Digital Active Gate Drive Technologies
Mon. Jun 1, 2026 4:30 PM - 6:10 PM JST
Mon. Jun 1, 2026 7:30 AM - 9:10 AM UTC
Mon. Jun 1, 2026 7:30 AM - 9:10 AM UTC
Hall 3 & 4(2F)
Chair:Hidemine Obara(Yokohama National University)
[O3-10-01]A New Active Gate-Drive Circuit and Control Signal Generation Method for a One-Pulse Active Gate Control
*Daiki Yamaguchi1, Shinji Sato1, Fumiki Kato1 (1. National Institute of Advanced Industrial Science and Technology (Japan))
[O3-10-02]A Development of a 4-bit Logic Active Gate Driver to Improve the Performance of Three-Phase Inverters
Thanh-Hoa Nguyen-Thi1,3, Long Van Pham1, *Chi-Hieu Pham1, Trong-Minh Tran1, Obara Hidemine2 (1. Hanoi University of Science and Technology (Viet Nam), 2. Yokohama National University (Japan), 3. Hung Vuong University (Viet Nam))
[O3-10-03]A Real-Time Feedback Control of Surge Voltage in a Three-Phase Inverter by Digital Active Gate Drive
*Hidemine Obara1, Katsuhiro Hata2 (1. Yokohama National University (Japan), 2. Shibaura Institute of Technology (Japan))
[O3-10-04]Feedback Control of Conducted EMI in a Three-Phase Inverter Using Digitally Controlled Gate Drive
Shimon Shigetomi1, *Katsuhiro Hata1, Hidemine Obara2 (1. Shibaura Institute of Technology (Japan), 2. Yokohama National University (Japan))
[O3-10-05]Turn-ON Peak Current Suppression of SiC-MOSFETs Under Variable Switching Current Utilizing Gate Resistor Array
*Tomoyuki Mannen1 (1. Utsunomiya University (Japan))
