Presentation Information
[ED4-05]Experimental Validation of Key Elemental Circuits for RSFQ All-Digital Phase Locked Loop
*Yoshinao Mizugaki1, Daiki Fukuyo1 (1. The University of Electro-Communications (Japan))
Keywords:
single flux quantum,Josephson effects,Nb/AlOx/Nb,time-to-digital converter,digitally controlled oscillator
[Purpose]
Rapid single flux quantum (RSFQ) circuits are highly attractive for controlling superconducting qubits due to their high-speed operation, low power consumption, and cryogenic compatibility. A key component for such systems is a stable clock generator, for which an all-digital phase-locked loop (ADPLL) is a promising solution. We previously proposed a novel RSFQ ADPLL architecture, including an improved time-to-digital converter (TDC) and proportional-differential (PD) controller, which simulations confirmed to achieve lower frequency error than conventional designs. In this work, we report the first experimental demonstration of the key elemental circuits of our proposed ADPLL.
[Method]
The circuits, including the TDC, DCO, DCO controller, and a buffer for the PD controller, were designed using the "CONNECT" cell library and fabricated using the AIST-HSTP 10 kA/cm2 Nb/AlOx/Nb process.
[Results]
All elemental circuits were successfully operated in a liquid helium bath. Notably, the TDC correctly generated multi-bit digital signals accurately reflecting the precise time difference between external and internal clock inputs.
[Consideration]
These results validate our circuit designs and represent a critical step toward realizing a fully integrated, high-performance RSFQ ADPLL for advanced qubit control.
Rapid single flux quantum (RSFQ) circuits are highly attractive for controlling superconducting qubits due to their high-speed operation, low power consumption, and cryogenic compatibility. A key component for such systems is a stable clock generator, for which an all-digital phase-locked loop (ADPLL) is a promising solution. We previously proposed a novel RSFQ ADPLL architecture, including an improved time-to-digital converter (TDC) and proportional-differential (PD) controller, which simulations confirmed to achieve lower frequency error than conventional designs. In this work, we report the first experimental demonstration of the key elemental circuits of our proposed ADPLL.
[Method]
The circuits, including the TDC, DCO, DCO controller, and a buffer for the PD controller, were designed using the "CONNECT" cell library and fabricated using the AIST-HSTP 10 kA/cm2 Nb/AlOx/Nb process.
[Results]
All elemental circuits were successfully operated in a liquid helium bath. Notably, the TDC correctly generated multi-bit digital signals accurately reflecting the precise time difference between external and internal clock inputs.
[Consideration]
These results validate our circuit designs and represent a critical step toward realizing a fully integrated, high-performance RSFQ ADPLL for advanced qubit control.