Presentation Information
[23a-1BM-4]C2RTL-designed RISC-V Processor for Optically-driven Biomedical and IoT platform
〇(D)Panithan Srisinsuphya1, Kosuke Takamatsu1, Yasufumi Yokoshiki1, Takashi Tokuda1 (1.Tokyo Inst. of Tech.)
Keywords:
RISC-V,C2RTL,IoT
In the pursuit of smart, green technologies, there is an increasing need for small, reusable, low-powered devices that are powerful enough for edge computing. In the creation of CPUs and other digital design, the usage of Verilog, a hardware description language is commonly used due to the ease in testing and the ability to easily manipulate how the device works. However, compared to high level programming languages such as C++ or Python, the number of people who knows the language is small.
To solve this issue, we utilize C2RTL, a translation language to convert code written in C++ into Verilog to synthesize a CPU. Additionally, to facilitate operation under intermittent operation we utilize a power management unit (PMU). The resulting CPU has an area of 985x1850 μm2 with a power consumption of 7mW and a clock of 10MHz.
To solve this issue, we utilize C2RTL, a translation language to convert code written in C++ into Verilog to synthesize a CPU. Additionally, to facilitate operation under intermittent operation we utilize a power management unit (PMU). The resulting CPU has an area of 985x1850 μm2 with a power consumption of 7mW and a clock of 10MHz.