[11a-S1-1~9] 13.5 Semiconductor devices/ Interconnect/ Integration technologies

10:00 AM - 10:15 AM JST(1:00 AM - 1:15 AM UTC)

[11a-S1-5] An asymmetric SRAM cell for EMP operation and its 16-parallel-READ-access macro application

〇Ryo Fujishita¹, Yusaku Shiotsu¹, Satoshi Sugahara¹ (1.FIRST, Inst. of Sci. Tokyo)

Keywords:

SRAM,Energy-minimum-point operation,Parallel-READ-access macro