Presentation Information

[11p-E101-3]Expanding Semiconductor Circuit Design Space through Researchers-AI Collaboration for Next-Generation AI Chip Design

〇Yasutaka Serizawa1,2, Kenta Naito1, Hisanori Matsumoto1 (1.Hitachi R&D, 2.Hitachi High-Tech)

Keywords:

AI chip design,Generative AI utilization,Researchers-AI collaboration

With the ongoing expansion of AI applications into real-world environments, the performance limitations of general-purpose processors are becoming increasingly evident, while the importance of dedicated AI chips continues to grow. However, the deployment of AI chips in physical field sites has struggled to keep pace with the rapid evolution of AI model development. This challenge stems from the increasing sophistication and complexity of semiconductor design, together with the growing design effort required to search for optimal solutions under constrained hardware resources. In this talk, we review recent trends in automated AI chip design technologies that utilize generative AI to accelerate the generation and refinement of design candidates, and discuss future directions for collaboration between researchers and AI in next-generation design processes.