[8p-E219-1~13] 9.3 Nanoelectronics

3:30 PM - 3:45 PM JST(6:30 AM - 6:45 AM UTC)Presentation by Applicant for JSAP Young Scientists Presentation Award

[8p-E219-8] Modeling of Si MOSFET Involved in Failure Modes for Machine-Learning-based Non-destructive Characterization

〇(DC)Renxiang Lyu¹, Hyoto Yamaguchi¹, Zenji Yatabe¹, Seiya Kasai¹ (1.RCIQE, Hokkaido Univ.)

Keywords:

Semiconductor,Machine learning,Interface trap

Non-destructive evaluation of semiconductor devices is useful for improving device reliability. We have investigated a method for estimating internal information of Si MOSFETs from electrical characteristics. In this study, as an extension of this method to internal-state evaluation of Si MOSFETs, we focused on interface traps, which are representative non-ideal factors, evaluated the relationship between interface traps and drain current using device simulation.