Presentation Information
[9p-PA2-45]Investigation of FAB processing time effects on bump-electrode normal resistance in surface-activated bonding
〇Miyuki Ozawa1, Shigeru Kawakami1, Yutaka Tabuchi1 (1.Riken RQC)
Keywords:
superconducting quantum computer,indium bump electrode
Scaling superconducting quantum circuits requires higher integration density, for which three-dimensional (3D) integration beyond planar approaches is a promising solution. Vertical stacking separates and integrates functions across layers, enabling heterogeneous processes while improving packing density and design flexibility.
We study flip-chip bonding of stacked substrates using aluminum films and indium bumps. Aluminum offers mature processing and good coherence, while indium provides reliable superconducting interconnects at low temperatures. We examine how FAB (Fast Atomic Beam) processing time affects contact resistance at the Al-In interface. Argon FAB removes native oxides, though excessive exposure can cause redeposition and degrade bonding. Experiments show that increasing FAB time reduces resistance via oxide removal and surface activation, while excessive irradiation introduces variability, highlighting the necessity in optimizing FAB processing.
We study flip-chip bonding of stacked substrates using aluminum films and indium bumps. Aluminum offers mature processing and good coherence, while indium provides reliable superconducting interconnects at low temperatures. We examine how FAB (Fast Atomic Beam) processing time affects contact resistance at the Al-In interface. Argon FAB removes native oxides, though excessive exposure can cause redeposition and degrade bonding. Experiments show that increasing FAB time reduces resistance via oxide removal and surface activation, while excessive irradiation introduces variability, highlighting the necessity in optimizing FAB processing.