Presentation Information

[15p-PB1-51]Optimization of Fabrication Processes for Heavily Doped p-Type Si Layers for Semiconductor Spin Devices

〇(M1)Fumiya Kishi1, Yuki Miura1, Shunta Matsuda1, Mizue Ishikawa1 (1.Nihon Univ.)

Keywords:

spin,Silicon,spin MOSFET