[17p-W8E_308-1~15] 11.5 Junction and circuit fabrication process, digital applications

2:30 PM - 2:45 PM JST(5:30 AM - 5:45 AM UTC)

[17p-W8E_308-5] Measurement and evaluation of threshold offset of adiabatic quantum flux parametron circuits

〇Yutaro Kashiwagi¹, Nobuyoshi Yoshikawa¹ (1.Yokohama National Univ.)

Keywords:

Superconducting Integrated Circuits,Adiabatic quantum flux parametron circuit,flux trapping

Adiabatic Quantum Flux Parametron (AQFP) circuits feature dynamic power consumption five to six orders of magnitude lower than CMOS circuits and high-speed operation at 5 to 10 GHz. However, they suffer from a problem of logic threshold offset. To mitigate this problem, we measured the logic threshold offset of AQFP buffer gates across multiple chips and analyzed the cause of its occurrence.