[Session 1] Session 1: Memory Devices

1:50 PM - 2:10 PM JST(4:50 AM - 5:10 AM UTC)

[Session_1-03] Vertical Channel-All-Around a-IGZO-FET Towards 2T1D eDRAM Design with Self-Boosted Storage-Node Voltage

*Wenxiang Tang^1,2, Xufan Li^1,2, Yue Zhao^1,2, Xiaoyi Zhang^1,2, Qingxiao Zhu^1,2, Jingrui Guo³, Lingfei Wang^1,2, Ling Li^1,2 (1. State Key Lab of Fabrication Technologies for Integrated Circuits, Institute of Microelectronics, Chinese Academy of Sciences, 2. University of Chinese Academy of Sciences, 3. School of Information Science and Engineering, Shandong University)