[6] Poster Session

[6-11] Design Optimization of SiC CMOS FinFET for High-Temperature Next-generation SoC Logic Applications

*Tae Seong Kwon^1,2, Young Jo Kim¹, Hyoung Woo Kim¹, Young Jun Yoon³, Jae Hwa Seo¹, Sung Yun Woo² (1. Korea Electrotechnology Research Inst. (KERI) (Korea), 2. Kyoungpook National Univ. (Korea), 3. Gyeongkuk National Univ. (Korea))