[A-6] VLSI設計技術

10:30 AM - 10:45 AM JST(1:30 AM - 1:45 AM UTC)

[A-6-03] A Winograd-CNN Accelerator with Zero-Padding Filter Normalization

〇Kyosuke Takada¹, Hiroshi Arai¹ (1. Chiba Institute of Technology)

Keywords:

FPGA,Winograd algorithm,CNN accelerator,YOLOv3-Tiny,Kria KV260