IEICE Society Conference 2024
Advanced Search

Session Details

一般セッションPublic Session : General Session

[A-6]VLSI設計技術

Fri. Sep 13, 2024 10:00 AM - 11:00 AM JST
Fri. Sep 13, 2024 1:00 AM - 2:00 AM UTC
Building No.1 2F 1-254(Nippon Institute of Technology)
Chair:Sasagawa Yukihiro
10:00 AM - 10:15 AM JST(1:00 AM - 1:15 AM UTC)

[A-6-01]Binary Synthesis from 64bit RISC-V Executable Codes Using General-Purpose High-Level Synthesizer

〇Suguru Yura1, Nagisa Ishiura1 (1. Kwansei Gakuin University)
10:15 AM - 10:30 AM JST(1:15 AM - 1:30 AM UTC)Candidate for Academic Incentive Award

[A-6-02]Efficitent FPGA Implementation of Multiple-Input Adders Using Generalized Parallel Counter (6,0,7;5)

Mugi Noda1, ◎Ryo Kanai1, Nagisa Ishiura1 (1. Kwansei Gakuin U)
10:30 AM - 10:45 AM JST(1:30 AM - 1:45 AM UTC)

[A-6-03]A Winograd-CNN Accelerator with Zero-Padding Filter Normalization

〇Kyosuke Takada1, Hiroshi Arai1 (1. Chiba Institute of Technology)
10:45 AM - 11:00 AM JST(1:45 AM - 2:00 AM UTC)

Break time

Back to Category List