[A-1] Circuits and Systems

10:45 AM - 11:00 AM JST(1:45 AM - 2:00 AM UTC)Candidate for Academic Incentive AwardCareer Explorer

[A-1-05] Proposal for an Analog-to-Time Converter Using a PLL

◎△Yoshiki Koshiyama¹, Hiroki Nishihara¹, Akira Yasuda¹ (1. Hosei Univ.)

Keywords:

Time-domain analog signal processing,Advanced CMOS process,Phase Locked Loop,Analog-to-Time Converter

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